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  1. International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems.
  2. International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems
  3. Exploring advanced architectures using performance prediction
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2008 International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems
Innovative architecture for future generation high-performance processors and systems (iwia 2007)
International Workshop on Innovative Architecture for Future Generation High Performance Processors and Systems (IWIA'06)
Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA'05)
Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA'04)
Innovative Architecture for Future Generation High-Performance Processors and Systems, 2003
International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems
International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems
Power and performance fitting in nanometer design
Reducing power with an L0 instruction cache using history-based prediction
Tight non-linear loop timing estimation
Exploring advanced architectures using performance prediction
Trading bandwidth for latency: managing continuations through a carpet bag cache
Architecture and compiler co-optimization for high performance computing
Multigrain parallel processing for JPEG encoding on a single chip multiprocessor
Branch classification to control instruction fetch in simultaneous multithreaded architectures
Preliminary evaluation of a binary translation system for multithreaded processors
A low latency high bandwidth network interface prototype for PC cluster
Design and implementation of interrupt packaging mechanism
A networking oriented data-driven processor: CUE
Author index
2001 Innovative Architecture for Future Generation High-Performance Processors and Systems
Innovative Architecture for Future Generation High-Performance Processors and Systems (Cat. No.PR00650)
Innovative Architecture for Future Generation High-Performance Processors and Systems
Proceedings Innovative Architecture for Future Generation High-Performance Processors and Systems

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Exploring advanced architectures using performance prediction

Content Provider IEEE Xplore Digital Library
Author Kerbyson, D.J. Wasserman, H.J. Hoisie, A.
Copyright Year 2002
Description Author affiliation: Parallel Architectures & Performance Team, Los Alamos Nat. Lab., NM, USA (Kerbyson, D.J.; Wasserman, H.J.; Hoisie, A.)
Abstract In this work we show how by the examination of the key characteristics of an application, analytical performance models can be formed. These models are parameterized in terms of computational and communication performances of an individual system and can be used to explore achievable performance of an application prior to system availability. Two applications are considered: an adaptive mesh refinement code on structured meshes, and an Sn transport code on unstructured meshes. These are representative of part of the ASCI workload. One of the models is utilized to validate the performance of a Compaq Alpha-server ES45 supercomputing system being built at Los Alamos, and expected to grow to 30 TFLOPS peak performance in the next year. In addition, the models are used to explore the achievable performance on hypothesized future systems with increased peak computation and communication performance.
Starting Page 27
Ending Page 37
File Size 572135
Page Count 11
File Format PDF
ISBN 0769516351
ISSN 15373223
DOI 10.1109/IWIA.2002.1035016
Language English
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date 2002-01-11
Publisher Place USA
Access Restriction Subscribed
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword Performance analysis Predictive models Analytical models Adaptive mesh refinement Tin Hardware Process design Computational modeling Parallel architectures Laboratories
Content Type Text
Resource Type Article
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