NDLI: FAME: A Fast and Accurate Memory Emulator for New Memory System Architecture Exploration

Content Provider	IEEE Xplore Digital Library
Author	Malladi, K.T. Mu-Tien Chang Ping, J. Hongzhong Zheng
Copyright Year	2015
Abstract	Memory systems are critical to system responsivenessand operating costs. New memory technologies like PCM, STT-MRAM, RRAM are poised to provide an intermediatememory layer between DRAM and flash to better serve the needs of capacity, latency hungry datacenter applications. To drive their efficient deployment, it is imperative to make complex architectural decisions and justify the need to rethink system design. To assist this, we present FAME: a Fast and Accurate Memory Emulator methodology that combines the speed and accuracy of emulation with the detail of simulation for memory systems. We use QPI FPGA that is mainly used to accelerate computations, in a novel way to bring fast, cache-coherent DRAM emulation to systems that relied only on limited capabilities of simulation and NUMA platforms. Furthermore, we describe an integrated methodology that helps navigate DRAM memory caching and new technologies' microarchitectural timing simulation. Using FAME, we demonstrate that applications could obtain upto 2-3× system speedup using the new memory system tier.
Starting Page	43
Ending Page	46
File Size	221559
Page Count	4
File Format	PDF
ISSN	15267539
e-ISBN	9781467377201
DOI	10.1109/MASCOTS.2015.21
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-10-05
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Field programmable gate arrays Random access memory Emulation Microarchitecture Timing Bandwidth Benchmark testing
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Libarray of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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