NDLI: 1T-DRAM at the 22nm technology node and beyond: An alternative to DRAM with high-k storage capacitor

Content Provider	IEEE Xplore Digital Library
Author	Bawedin, M. Cristoloveanu, S. Hubert, A. Guegan, G. Chang, S.J. Sagnes, B. Martinez, F. Pascal, F. Valenza, M. Hoffmann, A.
Copyright Year	2011
Description	Author affiliation: IMEP-LAHC, Grenoble INP Minatec, France (Cristoloveanu, S.; Chang, S.J.) \|\| CEA-LETI, Minatec, Grenoble, France (Hubert, A.; Guegan, G.) \|\| IES, University of Montpellier II, France (Bawedin, M.; Sagnes, B.; Martinez, F.; Pascal, F.; Valenza, M.; Hoffmann, A.)
Abstract	In this work, we demonstrate that the MSDRAM can achieve better performances regarding to the sensing margin compared to programming methods like impact ionization and forward biased junctions. This improvement results mainly from the low current level at 0-state. Indeed, the MSDRAM uses gate capacitive coupling method which allows to reach zero current level. Finally, the band-to-band tunneling used to program the 1-state strongly reduces the power consumption and improves the device reliability. These promising results promote the MSD programming mechanism as a viable solution for low-power single-transistor DRAM memories.
Starting Page	93
Ending Page	94
File Size	382809
Page Count	2
File Format	PDF
ISBN	9781457710230
ISSN	2153327X
e-ISBN	9781457710254
DOI	10.1109/ISE.2011.6084998
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-08-28
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic gates Random access memory Rain
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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