NDLI: A CMOS 0.35-μm, 3.3-V PLL synthesizer for Bluetooth transmitter

Content Provider	IEEE Xplore Digital Library
Author	Saad, S. Mhiri, M. Ben Hammadi, A. Besbes, K.
Copyright Year	2012
Description	Author affiliation: Microelectronic and Instrumentation LR, FSM, University of Monastir, Monastir, Tunisia (Saad, S.; Mhiri, M.; Ben Hammadi, A.; Besbes, K.)
Abstract	A CMOS phase-locked loop (PLL) which synthesizes frequencies between 2.4 and 2.479 GHz with 1-MHz channel spacing and settles in approximately 100 μs is presented. The highlights of the topology are an N integer PLL architecture that operates with 1-MHz reference frequency and a passive discrete-time loop filter. The output signal is generated by a simple cross-coupled LC VCO and divided by a programmable frequency divider. The proposed PLL is designed to be employed as a synthesizer for Bluetooth transmitter in a low-cost CMOS technology. Simulated in 0.35-μm CMOS process, the PLL consumes 9.87 mA from a 3.3 V supply and achieves phase noise of −128.68 dBc/Hz at 3 MHz offset and spurs of −67 dBc at 3 MHz.
Starting Page	1
Ending Page	5
File Size	370621
Page Count	5
File Format	PDF
ISBN	9781467319263
e-ISBN	9781467319287
DOI	10.1109/DTIS.2012.6232954
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-05-16
Publisher Place	Tunisia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Phase noise wireless communications Frequency synthesizers CMOS PLL Bluetooth Synthesizers Voltage-controlled oscillators frequency synthesizers CMOS integrated circuits Phase locked loops
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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