NDLI: A low cost and low power silicon npn bipolar process with NMOS transistors and its wireless applications

Content Provider	IEEE Xplore Digital Library
Author	Tewksbury, T. Dawe, G. Tsai, C. Garone, P. Scharf, B. Kermarrec, C. Yasaitis, J.
Copyright Year	1995
Description	Author affiliation: Analog Devices Inc., Wilmington, MA, USA (O, K.; Tewksbury, T.; Dawe, G.; Tsai, C.; Garone, P.; Scharf, B.; Kermarrec, C.; Yasaitis, J.)
Abstract	Microwave and dc characteristics, and wireless applications of a low cost and low power silicon bipolar process with NMOS transistors are described. The process features 25-GHz double-polysilicon self-aligned npn bipolar transistors with 5.5-V BV/sub CEO/, optional 0.7-/spl mu/m NMOS transistors with p/sup +/ polysilicon gate for switch applications, lateral pnp transistors, high and low valued resistors, inductors, and p/sup +/ polysilicon-to-n/sup +/ plug capacitors. The RF and microwave capabilities of the process up to several GHz are demonstrated by fabricating and characterizing RF amplifiers, low noise amplifiers, and RF switches.
Starting Page	93
Ending Page	98
File Size	823685
Page Count	6
File Format	PDF
ISBN	0780319826
DOI	10.1109/MTTTWA.1995.512332
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-02-20
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Costs Silicon MOS devices MOSFETs Switches Radio frequency Radiofrequency amplifiers Bipolar transistors Microwave transistors Resistors
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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A low cost and low power silicon npn bipolar process with NMOS transistors and its wireless applications