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  1. Computer Architecture Letters
  2. Year : 2008 Volume : 7
  3. Issue 1
  4. An Energy-Efficient Processor Architecture for Embedded Systems
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Year : 2015 Volume : 14
Year : 2014 Volume : 13
Year : 2013 Volume : 12
Year : 2012 Volume : 11
Year : 2011 Volume : 10
Year : 2010 Volume : 9
Year : 2009 Volume : 8
Year : 2008 Volume : 7
Issue 2
Issue 1
Dynamic Predication of Indirect Jumps
Microarchitectures for Managing Chip Revenues under Process Variations
Physical register reference counting
Logic-Based Distributed Routing for NoCs
Chameleon: A High Performance Flash/FRAM Hybrid Solid State Disk Architecture
Computing Accurate AVFs using ACE Analysis on Performance Models: A Rebuttal
Corollaries to Amdahl's Law for Energy
An Energy-Efficient Processor Architecture for Embedded Systems
Year : 2007 Volume : 6
Year : 2006 Volume : 5
Year : 2005 Volume : 4
Year : 2004 Volume : 3
Year : 2003 Volume : 2
Year : 2002 Volume : 1

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An Energy-Efficient Processor Architecture for Embedded Systems

Content Provider IEEE Xplore Digital Library
Author Balfour, J. Dally, W.J. Black-Schaffer, D. Parikh, V. JongSoo Park
Copyright Year 2002
Abstract We present an efficient programmable architecture for compute-intensive embedded applications. The processor architecture uses instruction registers to reduce the cost of delivering instructions, and a hierarchical and distributed data register organization to deliver data. Instruction registers capture instruction reuse and locality in inexpensive storage structures that arc located near to the functional units. The data register organization captures reuse and locality in different levels of the hierarchy to reduce the cost of delivering data. Exposed communication resources eliminate pipeline registers and control logic, and allow the compiler to schedule efficient instruction and data movement. The architecture keeps a significant fraction of instruction and data bandwidth local to the functional units, which reduces the cost of supplying instructions and data to large numbers of functional units. This architecture achieves an energy efficiency that is 23x greater than an embedded RISC processor.
Starting Page 29
Ending Page 32
Page Count 4
File Size 160873
File Format PDF
ISSN 15566056
Volume Number 7
Issue Number 1
Language English
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date 2008-01-01
Publisher Place U.S.A.
Access Restriction Subscribed
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword Energy efficiency Embedded system Registers Computer architecture Costs Computer applications Embedded computing Pipelines Communication system control Logic Mobile processors
Content Type Text
Resource Type Article
Subject Hardware and Architecture
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