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  1. ACM SIGARCH Computer Architecture News (CARN)
  2. Volume 23
  3. Volume 23, Issue 4, Sept. 1995
  4. Performance modeling using the Motorola PowerPC timing simulator
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Volume 23
Volume 23, Issue 5, Dec. 1995
Volume 23, Issue 4, Sept. 1995
The memory wall and the CMOS end-point
Graffiti on “the memory wall”
Performance modeling using the Motorola PowerPC timing simulator
SIMD machines
Airdisks and airRAID (expanded extract)
Efficient shared memory with minimal hardware support
Volume 23, Issue 3, June 1995
Volume 23, Issue 2, May 1995
Volume 23, Issue 1, March 1995
Volume 22
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Volume 17
Volume 16
Volume 15
Volume 14
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Performance modeling using the Motorola PowerPC timing simulator

Content Provider ACM Digital Library
Author Afzal, Tariq
Abstract Published and projected benchmark numbers do not necessarily help predict the behavior of a user application on a particular microprocessor system. The real test comes when a user application is executed and timed on the microprocessor[5], which usually stresses the system in a different fashion than most benchmarks do. Unfortunately, the lack of stable platforms in earlier stages of system design prevents a developer from performing such evaluation tasks. This paper illustrates how application developers looking for a head start can use the Motorola Timing Simulator for the PowerPC 603™ microprocessor to analyze the expected behavior of a user program for various memory subsystems and gather fairly accurate timing information. A study of some SPEC™ benchmarks is also done in this respect.
Starting Page 9
Ending Page 18
Page Count 10
File Format PDF
ISSN 01635964
DOI 10.1145/218864.218867
Journal ACM SIGARCH Computer Architecture News (CARN)
Volume Number 23
Issue Number 4
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 1981-04-01
Publisher Place New York
Access Restriction One Nation One Subscription (ONOS)
Content Type Text
Resource Type Article
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